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Virage Logic's ASAP Memory Solidifies Place in the SoC Ecosystem with Incorporation into CEVA DSP Platform
High-Speed, High-Performance Memories Accelerate Silicon
Success of DSPs for High-Volume
Consumer and Communications Applications
SAN FRANCISCO—(BUSINESS WIRE)—July 24, 2006—
Virage Logic Corporation (Nasdaq:VIRL), a pioneer in Silicon Aware
IP(TM) and leading provider of semiconductor intellectual property
(IP) platforms, and CEVA, Inc. (Nasdaq:CEVA) (LSE:CVA), the leading
licensor of digital signal processor (DSP) cores, multimedia and
storage platforms to the semiconductor industry, announced today that
Virage Logic's Area, Speed and Power (ASAP) Memory(TM) High-Speed (HS)
memory IP has been adopted by CEVA for global use in its CEVA-XS(TM)
based system platforms.
Virage Logic's ASAP Memory HS is designed for high-performance
applications, making it the perfect choice for the CEVA-XS platforms,
including the CEVA-XS1200, which targets mobile multimedia
applications such as high-end multimedia phones, personal media
players (PMPs) and mobile TVs, and the CEVA-XS1102, which targets
3.5G/HSDPA handsets, WiMax/WiBro terminals and Smartphone
applications. CEVA-XS is a family of low-power, highly integrated DSP
system platforms designed to reduce development costs and
time-to-market for customers designing next-generation DSP-powered
devices. Built around the industry-leading CEVA-X DSP cores, the
CEVA-XS platforms use industry standard system buses, offering
designers the ability to add their own hardware blocks or connect the
DSP to other systems present on chip.
The ASAP Memory HS's high-performance architecture begins with the
design of its bit cells, which are optimized for fast signal
propagation, with the lowest possible bit-line coupling for very high
stability. Proprietary circuit design techniques, including high-speed
sense amplifiers, fast clocking and fast bit-line recovery contribute
to achieving the high speeds required by today's high-performance
applications.
"Virage Logic's highly differentiated IP was chosen for its
ability to help us maximize the performance of our CEVA-XS DSP
Platforms," said David Dahan, vice president of operations at CEVA.
"In turn, these performance advantages provide our customers with the
ability to differentiate their products that target the multimedia,
communications and consumer markets."
"CEVA's decision to incorporate Virage Logic's ASAP Memory IP into
their CEVA-XS system platforms underscores the speed and performance
benefits that choosing the right physical IP provides to the overall
performance of functional IP such as DSPs," said Jim Ensell, senior
vice president of marketing and business development for Virage Logic.
"We're very pleased to serve as CEVA's trusted IP partner."
Increasingly complex System-on-Chips (SoCs) require greater
amounts of memory, which present significant wafer yield issues. Using
Virage Logic's silicon-proven embedded memory IP, designers can
integrate small, moderate or large amounts of on-chip memory to reduce
overall system cost and size, while meeting time-to-market
requirements. The ASAP Memory HS product is suited for high-volume
applications where high-speed, area-efficient memory implementation is
a requirement.
About Virage Logic's ASAP Memory Product Line
Today's System-on-Chip (SoC) designs vary widely with respect to
their density, speed and power requirements. To address these
demanding requirements, Virage Logic has architected three separate
families of sub-megabit embedded memory compilers under the Area,
Speed and Power (ASAP) Memory product line. The High-Density (HD)
memories address the needs of many applications that are optimized for
area: the High-Speed (HS) memories address the requirements of
high-performance systems and the Ultra-Low Power (ULP) memories
address the needs of power-sensitive portable applications. All ASAP
memories can optionally include the comprehensive Built-In-Self-Test
(BIST) implementation found in Virage Logic's Self-Test and Repair
(STAR) Memory System(TM) or integrate with most third-party BIST
engines.
The Virage Logic ASAP Memory product line represents the largest
selection of silicon-proven, high quality, easy to integrate, embedded
memory IP available today. Hundreds of memory compilers are available
ranging from 0.25um to 65nm and spanning many foundries.
About CEVA, Inc.
Headquartered in San Jose, Calif., CEVA is the leading licensor of
digital signal processor (DSP) cores, multimedia and storage platforms
to the semiconductor industry. CEVA licenses a family of programmable
DSP cores, associated SoC system platforms and a portfolio of
application platforms including multimedia, audio, Voice over Packet
(VoP), Serial Attached SCSI (SAS) and Serial ATA (SATA). In 2005,
CEVA's IP was shipped in over 130 million devices. For more
information, visit http://www.ceva-dsp.com
About Virage Logic Corporation
Founded in 1996, Virage Logic Corporation (Nasdaq:VIRL) rapidly
established itself as a technology and market leader in providing
advanced embedded memory intellectual property (IP) for the design of
complex integrated circuits. Now, as the company celebrates its 10th
anniversary, it is a global leader in semiconductor IP platforms
comprising embedded memories, logic, and I/Os and is pioneering the
development of a new class of IP called Silicon Aware IP(TM). Silicon
Aware IP tightly integrates Physical IP (memory, logic and I/Os) with
the embedded test, diagnostic, and repair capabilities of
Infrastructure IP to help ensure manufacturability and optimized yield
at the advanced process nodes. Virage Logic's highly differentiated
product portfolio provides higher performance, lower power, higher
density and optimal yield to foundries, integrated device
manufacturers (IDMs) and fabless customers who develop products for
the consumer, communications and networking, hand-held and portable,
and computer and graphics markets. The company uses its
FirstPass-Silicon(TM) Characterization Lab for certain products to
help ensure high quality, reliable IP across a wide range of foundries
and process technologies. The company also prides itself on providing
superior customer support and was recently named Customer Service
Leader of the Year in the Semiconductor IP Market by Frost & Sullivan.
Headquartered in Fremont, California, Virage Logic has R&D, sales and
support offices worldwide. For more information, visit
www.viragelogic.com.
Safe Harbor Statement under the Private Securities Litigation
Reform Act of 1995:
Statements made in this news release, other than statements of
historical fact, are forward-looking statements, including, for
example, statements relating to industry and company trends, business
outlook and products. Forward-looking statements are subject to a
number of known and unknown risks and uncertainties, which might cause
actual results to differ materially from those expressed or implied by
such statements. These risks and uncertainties include Virage Logic's
ability to improve its operations; its ability to forecast its
business, including its revenue, income and order flow outlook; Virage
Logic's ability to execute on its strategy to become a provider of
semiconductor IP platforms; Virage Logic's ability to continue to
develop new products and maintain and develop new relationships with
third-party foundries and integrated device manufacturers; adoption of
Virage Logic's technologies by semiconductor companies and increases
or fluctuations in the demand for their products; the company's
ability to overcome the challenges associated with establishing
licensing relationships with semiconductor companies; the company's
ability to obtain royalty revenues from customers in addition to
license fees, to receive accurate information necessary for
calculating royalty revenues and to collect royalty revenues from
customers; business and economic conditions generally and in the
semiconductor industry in particular; competition in the market for
semiconductor IP platforms; and other risks including those described
in the company's Annual Report on Form 10-K for the period ended
September 30, 2005, and in Virage Logic's other periodic reports filed
with the SEC, all of which are available from Virage Logic's website
(www.viragelogic.com) or from the SEC's website (www.sec.gov), and in
news releases and other communications. Virage Logic disclaims any
intention or duty to update any forward-looking statements made in
this news release.
All trademarks are the property of their respective owners and are
protected herein.
Contact:
Virage Logic Corporation
Sabina Burns, 510-743-8115
Email Contact
or
McClenahan Bruer Communications
Kerry McClenahan, 503-546-1002
Email Contact
or
CEVA, Inc.
Richard Kingston, 408-514-2976
Email Contact
or
Wired Island, Ltd.
Mike Sottak, 408-876-4418
Email Contact
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